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X's in mirrored value (UVM hardware reset sequence)

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Hi All,

I am facing an issue:

One of the register field is configured as :

 
field_a.configure(this, 12, 17, "RO", 0, 12'h0, 1, 0, 1);
field_a.set_compare(UVM_NO_CHECK);
 
While doing a reset test, first I reset model then start test.
 
But test fails with :

UVM_ERROR -- value read from DUT (0x0000000080001e00) does not match mirrored value (0x00000000XxxXfe00)

 

Basically the fields declared as RO and UVM_NO_CHECK goes X ?

 

 

Any idea what I am missing or doing wrong ?

 

Thanks.


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