System Verilog, UVM training online

This is a online training batch taught by experts working in Semiconductor Industry.

Course starts with System Verilog and covers advanced level UVM.
Course schedule is for 2.5 hours on Sat and Sun for 7 weeks. Graduates and working professionals can benefit from this training.

Next batch starting on July 11th, 2015!

For more details please email vlsitraining@artoflivinghet.org

Course schedule is for 2.5 hours on Sat and Sun for 7 weeks.
Graduates and working professionals can benefit from this training.

For more details please email vlsitraining@artoflivinghet.org