Hi,
I am having some trouble with creating a register model for my DUT.
It is intended for APB transactions.
I included an adapter and a predictor.
When i try to read or mirror a register i have written to i get a wrong value.
when looking at the waves i see that ALL my transactions are done properly - read and write.
also i noticed that the bus2reg function is called twice for each transaction, and in the write transactions both
calls to bus2reg function gives the same values but in the read transaction, the first call to bus2reg is good
and in the second call i get 0 in the data.
Any thoughts would be much appreciated...
my adapter:
virtual function void bus2reg(uvm_sequence_item bus_item, ref uvm_reg_bus_op rw);
apb_transaction tr;
`uvm_info("TRACE", $sformatf("%m"), UVM_HIGH);
if (!$cast(tr, bus_item)) begin
`uvm_fatal("REGERR", "%m: Failed to convert bus2reg");
end
rw.addr = tr.addr;
rw.data = tr.data;
rw.kind = tr.op_kind;
rw.status = UVM_IS_OK;
`uvm_info("DEBUG", $sformatf("%m. *** rw.addr = %0d, rw.data = %0d, rw.kind = %s, rw.status = %s", rw.addr, rw.data, rw.kind.name, rw.status.name), UVM_HIGH);
endfunction: bus2reg
Thx,
Assaf